Zen of Analog Circuit Design

by Anand Udupa

The book starts with a problem statement – how do you realize an Analog buffer, a circuit whose output follows its input even when loaded.

This makes such a circuit further deviate from the attributes of a buffer, which is expected to be a circuit that maintains its operation even in the presence of loading.

The Holy Grail of Analog design can be summed up as a quest for an elusive component– the Ideal buffer.

The ideal voltage source I have shown below a voltage source, connected to a node in a circuit. It tries to impose the voltage (depicted by the symbol Vs) on the node it is connected to. The circuit in turn loads it with a current Io. If the voltage source is ideal, then it continues to drive the node (of the circuit it is connected to) to the same value Vs irrespective of how much the current loading (Io) from the circuit is.

Another property of the ideal voltage source is that it has zero output impedance.

The ideal current source. As shown below, the ideal current source is one that draws (or pumps) a constant current from (or into) the node of a circuit.

As before, the operative word is ‘ideal’. In this case, the current remains the same (equal to Is) irrespective of the voltage Vo imposed by the circuit across the current source.

Another property of the ideal current source is that it has an infinite output impedance as shown below. What this implies is that irrespective of the voltage across it, the full current Is will flow into the load.

For a non-ideal current source, Ro would be finite. A finite value of Ro would cause the output current Io to have a dependence on the terminal voltage across it.

A voltage source and current source connected to each other forms a happy circuit and is able to establish its operating point easily.

A property of an active element that emerges with the above model is that it changes its terminal characteristics (Io versus Vo) when a stimulus (Vin) is applied!

In summary, while operating in the Saturation region, the MOS transistor has a High sensitivity to VGS (Vin) and a Low sensitivity to VDS (Vo).

The method to get all transistors to operate at their desired operating zones is what is called Biasing.

The words “Common source” qualifies the fact that the source terminals are connected to a constant potential (for the NMOS, this potential is ground and for the PMOS it is VDD). In other words, both the input and output are referred to the common terminal which is the source.

Whether a transistor in an analog circuit behaves like a current source or a voltage source is determined by whether what is forced is the controlling voltage or the current through it.

When VGS is forced, the transistor behaves like a current source at its Drain. When Id is forced, the transistor behaves like a voltage source between its Gate and Source.

So the output impedance as given by (Change in output voltage)/(Change in load current)

this points us to the fact that the Common source amplifier has a large output impedance. This should not be surprising – we have already intuitively seen that it is a poor buffer and not very robust to loading.

The way this can happen is if the source ‘follows’ the gate. So to a first order, we can assume that the change in Vin reflects at Vo.

The output impedance is therefore given by 1/gm. As we have seen before, gm is (relatively) large, so the factor 1/gm points to a ‘small’ output impedance.

The concept of when the MOS transistor behaves like voltage source and when it behaves like a current source can be used powerfully to analyse circuits.

In fact any node in the circuit that is connected to a resistor (or an element that mimics a resistor) and a capacitor has an associated pole. With such a pole comes the magnitude and phase effects as described for the R-C circuit.

Without much elaboration, let me state that the source of phase delays in our amplifiers are R-C type of circuit elements.

So we automatically have a ‘pole’ at the output node.

In fact,

every node in our circuit can potentially give rise to a pole. Given that you can have many such nodes in even a slightly complicated amplifier circuit, you have a scenario where the circuit has mu...