Intel® Xeon Phi™ Coprocessor Architecture and The Guide for Application Developers provides developers a comprehensive introduction and in-depth look at the Intel Xeon Phi coprocessor architecture and the corresponding parallel data structure tools and algorithms used in the various technical computing applications for which it is suitable. It also examines the source code-level optimizations that can be performed to exploit the powerful features of the processor. Xeon Phi is at the heart of world’s fastest commercial supercomputer, which thanks to the massively parallel computing capabilities of Intel Xeon Phi processors coupled with Xeon Phi coprocessors attained 33.86 teraflops of benchmark performance in 2013. Extracting such stellar performance in real-world applications requires a sophisticated understanding of the complex interaction among hardware components, Xeon Phi cores, and the applications running on them. In this book, Rezaur Rahman, an Intel leader in the development of the Xeon Phi coprocessor and the optimization of its applications, presents and details all the features of Xeon Phi core design that are relevant to the practice of application developers, such as its vector units, hardware multithreading, cache hierarchy, and host-to-coprocessor communication channels. Building on this foundation, he shows developers how to solve real-world technical computing problems by selecting, deploying, and optimizing the available algorithms and data structure alternatives matching Xeon Phi’s hardware characteristics. From Rahman’s practical descriptions and extensive code examples, the reader will gain a working knowledge of the Xeon Phi vector instruction set and the Xeon Phi microarchitecture whereby cores execute 512-bit instruction streams in parallel.
I must admit that I was perfectly happy programming my Phi devices without any assistance from a book, but seeing how the Kindle edition of this was (and still is) free on Amazon, I thought 'why not' and got a copy for the Kindle.
I happen to be one of those old-fashioned types who prefers paper books in 99% of cases, so the fact that I read this one is telling something. This is basically a book about the architecture of the Xeon Phi rather than about leveraging it to do 1001 interesting things.
This is good and bad. Good because you get to appreciate just what the hardware is like, and bad because ultimately, 99% of us do not really care. We buy devices because we want to get a performance boost, and I'm pretty sure typical quants couldn't care less about the intrinsic beauty and sophistication of a Phi device. There is simply not enough time to appreciate it - in fact, there's barely enough to figure out the performance characteristics and either put it to use or forget about it.
Overall, I'm satisfied with the book. I would prefer a book that goes more in-depth with regard to the examples, in particular considering the mechanics of Phi-enabled machine clusters, but then again, this book does have low-level stuff, such as an exposition of intrinsics (512-bit SIMD!) for measuring theoretical peak performance via MADD instructions.
هذا الكتاب جيد لمن يريد أن تعلم معمارية الزيون فاى. الكتاب يصف المعمارية بقدر كبير من التفصيل كما يعطى مُلخصاً عن الأدوات المُقدمة من إنتل للتعامل مع هذا المعالج المُعاون. The book is good for those who want to learn about the Xeon Phi architecture. It describe the architecture with a lot of details and also give a brief about the tools provided by Intel for playing with the Xeon Phi co-processor.