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Hardware Architectures for Post-Quantum Digital Signature Schemes

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This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.

192 pages, Hardcover

Published October 28, 2020

About the author

Deepraj Soni

2 books

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