Designing Asynchronous Circuits using NULL Convention Logic (NCL)

by Scott C. Smith, Jia Di

Designing Asynchronous Circuits using NULL Convention Logic (NCL) begins with an introduction to asynchronous (clockless) logic in general, and then focuses on delay-insensitive asynchronous logic design using the NCL paradigm. The book details design of input-complete and observable dual-rail and quad-rail combinational circuits, and then discusses implementation of sequential circuits, which require datapath feedback. Next, throughput optimization techniques are presented, including pipelining, embedding registration, early completion, and NULL cycle reduction. Subsequently, low-power design techniques, such as wavefront steering and Multi-Threshold CMOS (MTCMOS) for NCL, are discussed. The book culminates with a comprehensive design example of an optimized Greatest Common Divisor circuit. Readers should have prior knowledge of basic logic design concepts, such as Boolean algebra and Karnaugh maps. After studying this book, readers should have a good understanding of the differences between asynchronous and synchronous circuits, and should be able to design arbitrary NCL circuits, optimized for area, throughput, and power. Table of Introduction to Asynchronous Logic / Overview of NULL Convention Logic (NCL) / Combinational NCL Circuit Design / Sequential NCL Circuit Design / NCL Throughput Optimization / Low-Power NCL Design / Comprehensive NCL Design Example

100 pages, Paperback

First published August 8, 2009

About the author

Scott C. Smith received B.S. degrees in Electrical Engineering and Computer Engineering and the M.S. degree in Electrical Engineering from the University of Missouri—Columbia in 1996 and 1998, respectively, and the Ph.D. degree in Computer Engineering from the University of Central Florida, Orlando, in 2001. He started as an Assistant Professor at the University of Missouri—Rolla (now Missouri University of Science & Technology) in August 2001, was promoted to associate Professor in March 2007 (effective September 2007), and is currently an Associate Professor and the Interim Associate Department Head of Electrical Engineering at University of Arkansas, Fayetteville. He has authored 13 journal publications, 42 conference papers, three U.S./international patents, and two additional international patents, all of which can be viewed from his website: http://comp.uark.edu/~smithsco/. His research interests include computer architecture, asynchronous logic design, CAD tool development, embedded system design, VLSI, FPGAs, trustable hardware, self-reconfigurable logic, and wireless sensor networks. Dr. Smith is a Senior Member of IEEE and a Member of Sigma Xi, Eta Kappa Nu, Tau Beta Pi, and ASEE.