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Digital Electronics - Principles Devices Circuits And Gates: Digital Electronics Book For Electronics And Telecommunication Engineering

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To introduce basic postulates of Boolean algebra and shows the correlation between
Boolean expressions
To introduce the methods for simplifying Boolean expressions
To outline the formal procedures for the analysis and design of combinational circuits
and sequential circuits
To introduce the concept of memories and programmable logic devices.
To illustrate the concept of synchronous and asynchronous sequential circuits


UNIT I MINIMIZATION TECHNIQUES AND LOGIC GATES :-
Minimization Boolean postulates and laws – De-Morgan‟s Theorem - Principle
of Duality - Boolean expression - Minimization of Boolean expressions –– Minterm -
Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization
– Don‟t care conditions – Quine - McCluskey method of minimization.
Logic AND, OR, NOT, NAND, NOR, Exclusive–OR and Exclusive–NOR
Implementations of Logic Functions using gates, NAND–NOR implementations – Multi
level gate implementations- Multi output gate implementations. TTL and CMOS Logic and
their characteristics – Tristate gates


UNIT II COMBINATIONAL CIRCUITS :-
Design procedure – Half adder – Full Adder – Half subtractor – Full subtractor – Parallel
binary adder, parallel binary Subtractor – Fast Adder - Carry Look Ahead adder – Serial
Adder/ Subtractor - BCD adder – Binary Multiplier – Binary Divider - Multiplexer/
Demultiplexer – decoder - encoder – parity checker – parity generators – code converters –
Magnitude Comparator.


UNIT III SEQUENTIAL CIRCUITS :-
Latches, Flip-flops - SR, JK, D, T, and Master-Slave – Characteristic table and equation –
Application table – Edge triggering – Level Triggering – Realization of one flip flop using
other flip flops – serial adder/subtractor- Asynchronous Ripple or serial counter –
Asynchronous Up/Down counter - Synchronous counters – Synchronous Up/Down counters
– Programmable counters – Design of Synchronous state diagram- State table –
State minimization – State assignment - Excitation table and maps-Circuit implementation -
Modulo–n counter, Registers – shift registers - Universal shift registers – Shift register
counters – Ring counter – Shift counters - Sequence generators.


UNIT IV MEMORY DEVICES :-
Classification of memories – ROM - ROM organization - PROM – EPROM – EEPROM –
EAPROM, RAM – RAM organization – Write operation – Read operation – Memory cycle -
Timing wave forms – Memory decoding – memory expansion – Static RAM Cell- Bipolar
RAM cell – MOSFET RAM cell – Dynamic RAM cell –Programmable Logic Devices –
Programmable Logic Array (PLA) - Programmable Array Logic (PAL) – Field
Programmable Gate Arrays (FPGA) - Implementation of combinational logic circuits using
ROM, PLA, PAL.

UNIT V SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS :-


Synchronous Sequential General Model – Classification – Design – Use of
Algorithmic State Machine – Analysis of Synchronous Sequential Circuits

Asynchronous Sequential Design of fundamental mode and pulse mode circuits –
Incompletely specified State Machines – Problems in Asynchronous Circuits – Design of
Hazard Free Switching circuits. Design of Combinational and Sequential circuits using
VERILOG.


Students will be able
Analyze different methods used for simplification of Boolean expressions.
Design and implement Combinational circuits.
Design and implement synchronous and asynchronous sequential circuits.
Write simple HDL codes for the circuits.

301 pages, Kindle Edition

Published April 9, 2021

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