DESIGN OF LOW POWER CIRCUITS BY REVERSIBLE LOGIC

by Dhiraj Kumar

In today’s world, the complexity of the chip is increasing as more and more devices are being connected on a single chip. Due to the high density of the chip, the power dissipation increases demanding better power optimization methods. One of the methods to achieve power optimization is by using reversible logic.In recent years, there is a remarkable paradigm shift in computation efficiency due to information lossless computation performed by the reversible logic. The reversible logic means performing computation in such a way that using the output the input can be constructed and the erasure of intermediate data and power dissipation is eliminated. The reversible logic has been found advantages in the areas such as quantum computing, low power CMOS, Nano-Technology and optical computing. The classical counter developed with the gates such as NAND and NOR gate are not reversible. In this book i ll show how reversible gates such as Feynman gate, Sayem gate, Fredking gate and Peres gate etc are used as reversible gates. I have shown a simple design of a 4-bit Reversible asynchronous Up counter and the corresponding output of the reversible counter obtained using cadence virtuoso schematic editor with 180nm technology and also corresponding power dissipations are also observed in tabular forms.

48 pages, Kindle Edition

Published December 20, 2017