Routing Congestion in VLSI Circuits: Estimation and Optimization

by Prashant Saxena, Rupesh S Shelar (Contributor), Sachin S Sapatnekar (Contributor)

Provides an understanding of the root causes of routing congestion in VLSI circuits, techniques for estimating and optimizing this congestion. This book also offers a critical analysis of the accuracy and effectiveness of these techniques, so that the reader may choose an approach that is appropriate to their design goals.

Unknown Binding

First published January 1, 2007