VLSI Physical Design: From Graph Partitioning to Timing Closure

by Andrew B. Kahng, Jens Lienig, Igor L. Markov

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact.
 
"VLSI Physical From Graph Partitioning to Timing Closure" introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

321 pages, Paperback

First published February 9, 2011

Reviews

[Alessandro Piovaccari · Rating 5 out of 5]

This book is a great and well-written introduction to the various techniques and algorithms that power physical synthesis tools of digital SOC. Even if it is a little dated (pre FinFET), it still provides a very useful tool for learning the fundamental techniques with a good intuitive approach. Text can be followed even without completing the exercises. Great set of references to dive deeper into the covered topics.

[Paul Floyd · Rating 3 out of 5]

OK, but I felt that I needed to work on the exercises and algorithm code to get the most out of the book (not possible on the bus!).