A Systolic Array Optimizing Compiler

by Monica S. Lam

This book is a revision of my Ph. D. thesis dissertation submitted to Carnegie Mellon University in 1987. It documents the research and results of the compiler technology developed for the Warp machine. Warp is a systolic array built out of custom, high-performance processors, each of which can execute up to 10 million floating-point operations per second (10 MFLOPS). Under the direction of H. T. Kung, the Warp machine matured from an academic, experimental prototype to a commercial product of General Electric. The Warp machine demonstrated that the scalable architecture of high-peiformance, programmable systolic arrays represents a practical, cost-effective solu­ tion to the present and future computation-intensive applications. The success of Warp led to the follow-on iWarp project, a joint project with Intel, to develop a single-chip 20 MFLOPS processor. The availability of the highly integrated iWarp processor will have a significant impact on parallel computing. One of the major challenges in the development of Warp was to build an optimizing compiler for the machine. First, the processors in the xx A Systolic Array Optimizing Compiler array cooperate at a fine granularity of parallelism, interaction between processors must be considered in the generation of code for individual processors. Second, the individual processors themselves derive their performance from a VLIW (Very Long Instruction Word) instruction set and a high degree of internal pipelining and parallelism. The compiler contains optimizations pertaining to the array level of parallelism, as well as optimizations for the individual VLIW processors.

224 pages, Hardcover

First published January 31, 1989

Reviews

[Medhat2 · Rating 3 out of 5]

A PH.D dissertation Influenced future compiler work in high-level synthesis, hardware acceleration, and FPGA programming.
A foundational reference for researchers in parallel computing, VLSI design, and high-performance compiler construction.
Laid the foundation for later developments in high-level synthesis (HLS) and polyhedral compilation.

[Nick Black]

Ahhh, the mighty Array Systolic, perhaps the best example of the elusive MISD (multiple instruction / single datum) machine (see the Floyd Taxonomy of parallelized computation). I've been encouraged to plunder the research literature regarding these mysterious cantrips, and this seems as good a place as any to start...