Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL

by Michael D. Ciletti

Verilog aims to introduce new users to the language of Verilog with instruction on how to write hardware descriptions in Verilog in a style that can be synthesized by readily available synthesis tools. Offers clear exposition of the Verilog hardware description language. This book is written in a style that allows the user who has no previous background with hardware description languages (HDLs) to become skillful with the language. Features treatment of synthesis-friendly descriptive styles. An excellent book for self-study, reference, seminars, and workshops on the subject.

760 pages, Paperback

First published January 28, 1999

Reviews

[Pasupathy · Rating 5 out of 5]

Comprehensive book

[Usama Badshah]

ooo

[Naveen]

ok