Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints

by Sridhar Gangadharan, Sanjay Churiwala

This book serves as a hands-on guide to timing constraints in integrated circuit design.  Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly.  Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing.  Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.

253 pages, Hardcover

First published May 1, 2013

Reviews

[James Garland · Rating 5 out of 5]

Good sound guide to creating general technology-independent constraints for timing analysis.

It also includes a XDC (Xilinx Design Constraints) specific chapter by Frederic Revenue of Xilinx at the back of the book for those who want to get into writing constraints for a Xilinx FPGA rather an ASIC.