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Writing Testbenches Using SystemVerilog
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Writing Testbenches Using SystemVerilog

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If you survey hardware design groups, you will learn that between 60% and 80% of their effort is dedicated to verification. This may seem unusually large, but I include in "verification" all debugging and correctness checking activities, not just writing and running testbenches. Every time a hardware designer pulls up a waveform viewer, he or she performs a verification ...more
Hardcover, 412 pages
Published February 10th 2006 by Springer (first published January 1st 2006)
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